1. Field of the Invention
The present invention generally relates to timing extraction devices used in modems for transferring data via communications lines, such as telephone lines and dedicated lines.
2. Description of the Related Art
A modem (modulator/demodulator) is a data transmission device and is widely used in an analog line utilizing the voice band. In such a modem, it is necessary to extract information concerning timing for modulation performed at the transmitter from a signal received via the analog line in order to reproduce the original data at the receiver. In practice, there is a frequency offset which functions to affect the timing extracting operation at the receiver. Hence, it is necessary to stably extract timing information from the received signal irrespective of the existence of a frequency offset.
FIG. 1 shows a related modem utilizing a digital signal processor (DSP). The modem employs a modulation speed (baud rate) of 1920 bauds, a sampling frequency of 7680 Hz (equal to four times the baud rate), a frequency of 1920 Hz for performing timing control by means of a PLL (Phase-Locked Loop). A signal received via an analog line is sampled at a frequency of 7680 Hz by an A/D (Analog-to-Digital) converter 1. A digital signal thus generated is applied to a DSP (Digital Signal Processor) 2.
A demodulator 3 of the DSP 2 demodulates the digital signal from the A/D converter 1 and thereby generates a demodulated real component R and a demodulated imaginary component I. The waveforms of the demodulated real component R and the demodulated imaginary component I are respectively shaped by rolloff filters (BPF1) 4a and 4b. Then, the waveform-shaped demodulated real and imaginary components R and I are regulated at fixed levels by AGC (Automatic Gain Control) circuits 5a and 5b, respectively. The output signals of the AGC circuits 5a and 5b are applied to a timing extractor 6 and an automatic equalizer 7.
The timing extractor 6 includes band-pass filters 20a and 20b, which extract 1/2-Nyquist frequency components from the output signals of the AGC circuits 5a and 5b. In the example being considered, the Nyquist frequency is 1920 Hz, and the 1/2-Nyquist frequency is 980 Hz. The 1/2-Nyquist frequency components from the band-pass filters 20a and 20b are respectively squared by square multipliers 21a and 21b. The output signals of the square multipliers 21a and 21b are added to each other by an adder 22. The output signal of the adder 22 is applied to a band-pass filter (BPF2) having a center frequency of 1920 Hz. The bandpass filter 23 extracts a timing signal component having a frequency of 1920 Hz from the output signal of the adder 22. The 1920 Hz timing signal component from the band-pass filter 23 is converted into a vector signal by a vector conversion unit 24. The vector signal from the vector conversion unit 24 is a phase error signal having a frequency of 1920 Hz and indicating an error (advance or delay) in the phase of the timing signal component.
The timing error signal from the vector conversion unit 24 is applied to a secondary PLL unit 10 for phase decision, the unit 10 being provided in a MPU (MicroProcessor Unit). The PLL unit 10 functions as a phase synchronizing unit, and generates a sampling clock signal (internal timing signal) having a frequency of 7880 Hz. The automatic equalizer 7 equalizes the waveforms of the output signals from the AGC circuits 5a and 5b, and generates an equalized signal. A carrier phase correction unit (CAPC) 8 corrects the carrier phase of the output signal of the automatic equalizer 7. The output signal of the unit 8 is applied to a decision unit 9, which generates received data.
The structure shown in FIG. 1 is capable of stably extracting timing information from the received signal. In practice, the operations of the structural elements of the DSP 2 shown in FIG. 1 are realized by software, and data to be operated and the results of operations are stored in a RAM (Random Access Memory).
The band-pass filter 23 is a Nyquist extraction filter and has an extraction frequency equal to the baud rate (1920 Hz). Hence, the sampling frequency should be higher than twice the baud rate according to the sampling thereof and should be an integer multiple of the baud rate. With the above in mind, the speed (7680 Hz) equal to four times the baud rate (1920 Hz) is used as the sampling frequency of the Nyquist extraction filter 23. Hence, it is necessary to operate all the structural elements located at stages before the Nyquist extraction filter 23 at a frequency of 7680 Hz equal to four times the baud rate, as shown in FIG. 1.
Hence, the structure shown in FIG. 1 has the following disadvantages. A large amount of operation and a large RAM capacity are needed to realize the structural elements operating at a frequency of 7680 Hz. In practice, many DSPs are needed to a large amount of operation, and many RAM chips are needed to provide a large storage capacity. Hence, it is very difficult to provide compact, less-expensive modems.